1.0 HDI Construction Types & General Build-ups

HDI Type / Structure	Standard Capability	Definition & Application
1+N+1 (1-stage HDI)	Standard Production	One layer of microvias on each side of a core. Most common for BGAs with 0.8mm pitch or less.
2+N+2 (2-stage HDI)	Advanced Production	Two sequential HDI layers on each side. For ultra-fine pitch BGAs (≤0.5mm) and complex routing.
3+N+3 (3-stage+ HDI)	Advanced / Upon Review	Three or more sequential HDI layers. For chip packaging substrates and extreme density.
Any Layer HDI (ELIC)	Advanced / Upon Review	Microvias can connect any two adjacent layers in the stack-up. Maximum design flexibility for miniaturization.
Via-in-Pad (VIP) / Filled & Capped Vias	Standard	Microvias drilled directly into component pads, filled with conductive/non-conductive material and planarized. Critical for fine-pitch BGAs to eliminate air pockets.
Buried/Blind Vias (Mechanical)	Supported	Used in conjunction with laser microvias in complex hybrid builds.

2.0 Material Specifications

Parameter	Standard Capability	Advanced / Specialized Capability	Notes
Standard Core Material	FR-4 (TG170), Mid Loss (e.g., IT180A, Megtron 4)	High-Speed/Low Loss (Rogers, Taconic, Isola FR408HR), High Tg Halogen-Free	Thin core laminates (0.05mm - 0.1mm) are standard for HDI.
Prepreg Type	Standard & Low-Flow Resin Systems	Extra Low-Flow (ELF) for Improved Z-axis Fill	Critical for filling gaps in high-density via fields.
Copper Foil	Standard & Reverse-Treated Foil (RTF)	Very Low Profile (VLP) and Extremely Low Profile (ELP) Foil	Smoother foil reduces signal loss and improves fine-line etching.
Dielectric Thickness (Between Layers)	0.050 mm (2 mil) to 0.100 mm (4 mil)	As low as 0.040 mm (1.6 mil)	Enables tighter impedance control and microvia formation.

3.0 Mechanical & Dimensional Specifications

Parameter	Standard Capability	Advanced Capability	Notes
Max Number of Layers	Up to 20 layers (including HDI)	Up to 30+ layers	Total includes sequential lamination cycles.
Panel Size	24" x 24" (610mm x 610mm)	26" x 30" (660mm x 760mm)	Panel utilization is critical for HDI yield.
Board Thickness	0.4 mm (0.016") to 3.0 mm (0.118")	0.3 mm (0.012") to 4.0 mm (0.157")	Final thickness tolerance typically ±10%.
Bow & Twist	≤ 0.75% per IPC-6012	≤ 0.50%	Tight control is essential for laser drilling registration.

4.0 Drilling & Microvia Specifications

Parameter	Standard Capability	Advanced Capability	Notes
Laser Microvia Diameter (Finished)	0.075 mm - 0.10 mm (3 - 4 mil)	0.050 mm - 0.075 mm (2 - 3 mil)	CO2 and UV laser drilling available.
Microvia Capture Pad Diameter	≥ Microvia dia. + 0.15 mm (6 mil)	≥ Microvia dia. + 0.10 mm (4 mil)
Aspect Ratio (Laser Microvia)	0.75:1 (Standard)	1:1 (Max, upon review)	Depth vs. diameter. Impacts plating reliability.
Mechanical Drill Size (for buried vias)	0.15 mm (6 mil)	0.10 mm (4 mil)
Registration (Layer-to-Layer)	±0.050 mm (±2 mil)	±0.035 mm (±1.4 mil)	Critical for HDI yield.
Microvia Fill Type	Conductive (Capacitor Fill) or Non-Conductive (Resin Fill)	Planarized Copper Cap (≤ 0.025 mm above surface)	Filled and capped vias enable VIP design.

5.0 Circuit & Imaging (LDI – Laser Direct Imaging)

Parameter	Standard Capability	Advanced Capability	Notes
Min. Trace/Space (Inner Layer)	0.050 mm / 0.050 mm (2/2 mil)	0.035 mm / 0.035 mm (1.4/1.4 mil)	Required for routing between microvia pads.
Min. Trace/Space (Outer Layer)	0.050 mm / 0.050 mm (2/2 mil)	0.035 mm / 0.035 mm (1.4/1.4 mil)
Min. Annular Ring (Mechanical Drills)	0.075 mm (3 mil)	0.050 mm (2 mil)
Min. Annular Ring (Laser Microvias)	0.050 mm (2 mil)	0.035 mm (1.4 mil)
Copper Plating Thickness (Finished)	≥ 20 µm (0.8 mil)	Uniformity > 85% across panel	Uniform plating in microvias is critical.

6.0 Surface Finishes (RoHS Compliant)

Finish Type	Recommendation for HDI	Rationale
ENIG	Most Recommended	Flat surface essential for fine-pitch BGAs. Excellent for solder joint integrity and wire bonding.
Immersion Silver	Recommended	Excellent flatness and solderability. Good for high-frequency designs.
ENEPIG	Recommended for Advanced Packaging	Superior for multiple reflows and gold/aluminum wire bonding. Robust nickel barrier.
OSP	Limited Use	Can be used for cost-sensitive, simple HDI. Not ideal for multiple reflows or fine-pitch.
HASL (Lead-Free)	Not Recommended	Poor co-planarity, may bridge fine-pitch pads, thermal stress on microvias.

7.0 Solder Mask & Legend

Parameter	Standard Capability	Notes for HDI
Type	Liquid Photo-Imageable (LPI), High-Resolution	Required for tight dam control.
Solder Mask Alignment	±0.050 mm (±2 mil)	Critical for exposing tightly spaced pads.
Solder Mask Dam (Between Pads)	0.050 mm (2 mil)	Minimum recommended for 0.4mm pitch BGA.
Solder Mask Web (Between Via Pads)	0.040 mm (1.6 mil)	For via-in-pad designs with soldermask defined pads.

8.0 Electrical & Performance Testing

Test Type	Capability	Relevance to HDI
Electrical Test (Flying Probe)	100% Netlist Test	Standard for prototypes and low/medium volume.
Electrical Test (Universal Grid)	Up to 30,000 points/test field	High-volume production efficiency.
Controlled Impedance	±7% tolerance standard, ±5% available	TDR testing on coupons. Essential for high-speed designs on HDI.
High Voltage Test	Up to 1500 VDC	For specific isolation requirements.
Microsection Analysis	In-house lab for process validation	Critical for auditing microvia quality, fill, and plating.

9.0 Quality Assurance & Standards

Aspect	Standard
Primary Design Standard	IPC-2226 (Design Standard for HDI Boards)
Performance Standard	IPC-6012 with HDI requirements (Class 2/3)
Acceptability Standard	IPC-A-600
Inspection Methodology	Automated Optical Inspection (AOI) at each critical layer. 2D/3D X-Ray (AXI) for via fill and layer registration analysis.
Impedance Control	Design, modeling, and coupon testing per IPC-2141A.

Engineering Note

HDI designs require early and collaborative Design for Manufacturability (DFM) review. Please submit your stack-up and critical requirements (BGA pitch, impedance needs) for analysis before finalizing design files.